Re-Shoring Advanced Packaging
Innovation, Supply Chain Security, and Semiconductor Industry Leadership
Welcome to Semi-Literate, a guide to the chip industry through the lens of public policy.
BLUF: The United States semiconductor industry and the U.S. government are engaged in ambitious plans to expand domestic semiconductor manufacturing capacity. Targeted investment incentives to increase U.S.-based advanced packaging capacity are also important. Historically, packaging was viewed as a labor intensive and low-value added “back-end” activity (as opposed to high value-added “front-end” semiconductor fabrication). As a result, firms offshored these activities to overseas locations, primarily in Asia. This article discusses the supply chain for advanced packaging, leading firms, trends in innovation, and relevant policy developments.
“Packaging” is the process of protecting and connecting finished semiconductors (“chips”). After a chip is fabricated in a semiconductor factory or “fab,” chips need to be protected and attached to a printed circuit board (PCB) to function in an electronic device (ex. a smartphone). Advanced packaging is a sub-set of traditional packaging and refers to “a collection of approaches for combining chips into packages, resulting in lower power consumption and lower cost.” Historically, packaging was viewed as a labor intensive and low-value added “back-end” activity (as opposed to high value-added “front-end” semiconductor fabrication). As a result, firms offshored these activities to overseas locations, primarily in Asia. Two factors are driving a change in how packaging is viewed:
First, firms increasingly recognize the importance of packaging to processing power, particularly as Moore’s Law slows. As a result, firms are investing large amounts of capital to develop equipment, materials, and systems that support the advanced packaging ecosystem. Packaging was historically seen as a necessity to maintain the functionality of semiconductors. Advanced packaging is increasingly seen as an opportunity to advance the leading edge in semiconductor technologies.
Second, innovation in advanced packaging will be a key determinant of the depth and breadth of innovation in other emerging technologies. Currently, advanced packaging technologies are predominantly used in mobile and consumer electronic applications. Increasingly, however, advanced packaging technologies will see widespread adoption among cloud computing, medical, automotive, and aerospace applications. Advances in packaging amplify improvements in transistor density and improvements in transistor performance have important implications for firm leadership among a wide variety of emerging technologies. Firms that lead in advanced packaging and systems that lead in incorporating advanced packaged technologies will enjoy asymmetric performance advantages in the short and medium term.
What is Packaging and Why Does it Matter?
The process of semiconductor production involves three general steps: design, fabrication, and assembly, test, and packaging (collectively “ATP”). Once individual components have been designed and then fabricated on silicon wafers, the ATP step involves the use of specialized equipment and materials to dice these wafers into individual chips (“assembly”), test these chips for operability (“test”), and package them on to a larger device (“packaging”) to protect and enable their functionality. While assembly, test, and packaging represent discrete steps in the semiconductor fabrication process, they are generally conducted sequentially and frequently by the same firms using the same facilities in the same region(s) of the world.
As Figure 1 shows, semiconductor packaging provides two benefits: (1) it protects finished chips against threats such as mechanical impact, chemical contamination, radiation, heat, and/or light exposure, all of which can upset the functionality of an integrated circuit and (2) it provides a means of connecting an integrated circuit to the external environment, such as a printed circuit board (PCB), via balls, wires, or pins. These connections enable a devices functionality. Semiconductor packaging is an intermediate stage between manufacturing chips on silicon wafers and their incorporation into finished electronic devices like smartphones.
Advanced packaging refers to a subset of conventional semiconductor packaging which uses novel techniques and materials to increase integrated circuit performance, power, modularity, and durability. These advanced packages have a variety of benefits: lower latency, increased bandwidth, better efficiency and power delivery, and higher input/output density. Table 1 presents a non-exhaustive list of advanced packaging technologies, some of which are described in greater detail below.
How Packaging is Done: Materials, Equipment, and Services
The structure of the supply chain that supports semiconductor packaging mirrors the structure of the broader semiconductor supply chain. Raw materials suppliers, component suppliers, and equipment suppliers provide intermediate inputs that are used by firms (OSATs, IDMs, or foundries) that operate large, sterile, and increasingly-automated factories to process finished chips in preparation for their incorporation in to electronic products. Importantly, firms supplying advanced packaging materials, equipment, and services also compete in the market for conventional packaging. There are few, if any, firms that solely provide products or services targeting the advanced packaging market.
Assembly and Packaging Materials
The market for assembly and packaging materials was estimated to be $19 billion in 2019. Firms in Japan, South Korea, and Taiwan lead in this market. Assembly and packaging materials primarily consist of substrates, ceramic packages, lead frames, and bonding wire. One leading OSAT firm reported that the principal materials on which it relies for its packaging processes are “leadframes, laminate substrates, gold and copper wire, mold compound, epoxy, tubes and trays.” These materials are used to connect a fabricated chip to an encasing package, though the process and materials depend on the intended end use. One example of this process involves using bond wire to attach the chip to a lead frame. The lead frame transfers data between the chip and external devices. A protective ceramic package, plastic substrate, or encapsulant resin can also be bonded to the chip. Die attach materials including polymers and eutectic alloys are used to attach the chip to packages or substrates.
Assembly and Packaging Equipment
Assembly and packaging equipment and tools are used to take completed wafers and transform them in to packaged individual chips. Traditionally, this process is accomplished using equipment that inspects finished wafers, “dices” them into individual integrated circuits, bonds those individual integrated circuits to substrates, and packages those bonded ICs. Some advanced packaging techniques skip the process of dicing wafers and instead inspect them and bond them to a substrate before dicing in a process known as wafer level packaging. Tools used in this process include assembly inspection tools, dicing tools, bonding tools, and integrated assembly tools. Packaging tools, a sub-set of assembly tools, consist of equipment used to encase and label dies in their protective cases, protect the dies from environment as well as handle the final packaging of assembled dies.
OSAT, IDM, and Foundry Packaging Vendors
OSATs, IDMs and foundries use the aforementioned materials and equipment to assemble and package finished wafers. Firms headquartered in Taiwan, the United States, China, South Korea, and Japan account for the vast majority of packaging market share (measured in sales). However, measured by physical facility location, Asia is the clear leader. Recent estimates suggest China leads in the overall number of packaging facilities (114), followed by Taiwan (106), the rest of Asia-Pacific (65), North America (35), Japan (27), Europe (19). Though firms headquartered in the United States and Europe maintain some market share, The Semiconductor Industry Association estimates that at least 81% of the world’s ATP capacity is physically located in Asia.
Re-Shoring Advanced Packaging in the United States
OSAT, IDM, and Foundry Packaging Vendors
As of 2020, the top 10 leading firms engaged in advanced packaging accounted for 93% of all advanced packaging capacity. These 10 firms are located in Taiwan (48% of all capacity), the United States (22%), China (14%), and South Korea (9%). As Figure 1 shows, Taiwanese-headquartered OSAT firms and foundries (ASE Group, TSMC, Chipbond, and ChipMOS) collectively maintain a leading position in advanced packaging followed by OSATs and IDMs headquartered in the United States (Amkor and Intel), China (JCET, Huatian) and South Korea (Samsung, Nepes).
Leading foundries and OSATs (nearly all of whom are headquartered in Asia) have very little economic incentive to build an advanced packaging facility in the United States. The costs of re-shoring advanced packaging necessitate a well-defined strategy. This strategy should make efficient use of funds to target specific technologies in the advanced packaging ecosystem, while accepting that the economics of re-shoring the broader ATP ecosystem prevent a return of meaningful capacity to the United States. Policymakers should accept that there is almost no economic case for re-shoring mature packaging technologies and instead focus on a strategy that targets advanced packaging specifically. This strategy should consist of three pillars:
Increase advanced packaging facility capacity in the United States
Increase production of advanced packaging equipment and materials in the United States
Target research and development that supports innovation in advanced packaging
Increase advanced packaging facility capacity in the United States
Congress is considering allocating billions of dollars directly and indirectly to support the advanced packaging ecosystem. In addition to the $2.5 billion National Advanced Packaging Manufacturing Program, which is primarily an R&D effort, several lines of funding identified by the CHIPS Act are available as incentives for advanced packaging facility construction. For example, if the $2 billion earmarked for "fabrication, assembly, testing, or advanced packaging of semiconductors at mature technology nodes" were to be directed specifically to advanced packaging support for mature nodes, these incentives would meaningfully encourage establishment of new advanced packaging facilities in the United States. In order to make these funds go as far as possible, policymakers should also direct incentives to foundries and IDMs that have plans to expand semiconductor fabrication capabilities in the United States and preferentially direct incentive funds to projects that include a front end fab co-located with a back end ATP facility, ideally an advanced packaging facility. Large foundries and IDMs already prefer to co-locate their advanced packaging operations with the fabrication operations, and providing incentive for them to do so in the United States would maximize this return on investment. Additional funds could be provided to leading OSATs interested in establishing advanced packaging operations in the U.S. Importantly, there are a wide variety of techniques and technologies today which constitute advanced packaging and no approach has emerged as dominant. As a result, policymakers should target incentives at firms that are providing a variety of packaging services from wafer level packaging to flip chip-BGA. These incentives could also be conditioned based upon facility capacity, using cleanroom square footage and wafer processing size as reference points.
Increase supply of advanced packaging materials in the United States to reduce supply chain vulnerabilities
IC substrates are of particular importance to advanced packaging and U.S. firm presence and U.S. production in this market is extremely limited. IC substrates are used in a wide variety of electronics destined for aerospace and military applications in particular. The sole U.S.-based supplier of IC substrates suitable for advanced packaging reports that 36% of its total net sales (which also included IC substrates and printed circuit boards, among other electronic components) comes from the aerospace and defense market. Within the supply chain for advanced packaging, there is a particularly acute shortage of the IC substrate material and certain types of equipment. Of particular concern are Ajinomoto Build Up film substrates. These substrates are used in packaging processes for high end CPU, GPU and 5G networking chips by major chipmakers, including Intel, AMD, and Nvidia. Fires in October 2020 at February 2021 Taiwanese producers of substrates exacerbated this supply crunch, leading to waits of up to 40 weeks for certain substrates. Given the increasing importance of substrates, some funds could be directed to encourage formation of one or more joint ventures (either between an OSAT and a substrate supplier, a foundry/IDM and substrate supplier, or a substrate and PCB supplier) to increase domestic production of IC substrates.
Target research and development that supports advanced packaging
Innovation in advanced packaging materials, equipment, and services are all essential to future U.S. semiconductor leadership. Innovations that increase semiconductor performance while reducing power consumption, cost, and form factor should be prioritized. In addition, innovations which are easily commercialized, flexible, and scalable, should be prioritized. Fund for advanced packaging innovations related to chiplets and heterogeneous integration, equipment automation, and wafer level packaging should be prioritized based on these factors. More details are in the paper linked below.
Advanced packaging is increasingly prominent in technology roadmaps and important for emerging technologies. Yet the U.S. lacks advanced packaging capacity and the associated ecosystem to support packaging writ large. CHIPS Act funds allow, but do not require, that incentives be directed towards increasing U.S.-based packaging. Funds should be preferentially directed towards front end fabrication projects that also include a co-located advanced packaging facility and to support innovation in the advanced packaging ecosystem.
For more information on this subject, read this recent paper from Georgetown University’s Center for Security and Emerging Technology.
The views expressed here are my own and not those of employers past or present.